In synchronous data communication systems a problem exists to maintain the clock at the receiver in phase synchronization with the clock at the transmitter. Synchronization is needed to enable clock signals at the receiver to coincide with the center of the received data pulses, thus assuring that data bits are not added, lost or misinterpreted during data transmission.
For example, the transmission of digital video data over a digital communications channel usually requires that the communications channel be synchronous to the video data rate for complete recovery of the video data and its associated clock at the receiver. This requirement is due to the circuit (synchronous) rather than packet (asynchronous) nature of full motion video data. Although the video data can be packetized and sent over an asynchronous channel using elastic stores at both the transmitter and receiver, the video source A/D clock must still be synchronized to the receiver D/A converter clock to ensure error-free video transmission.
Prior art methods of video data transmission require 1) synchronization to the communications channel (synchronous transmission), 2) sending the clock information over a separate synchronous channel, 3) synchronizing transmitter and receiver to a third (master) clock source, or 4) accepting video data errors at the receiver as a result of the differences in transmit and receive clocks. Thus, if the communication channel does not operate synchronously with the video data source, the resulting solutions add complexity and expense to providing video data transmission.
Consequently, there is a continuing need to simplify the circuitry and reduce the cost of synchronizing transmitter and receiver clocks over an asynchronous communication channel.